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Channel: ESL – Observations from Uppsala
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Threading or Not as a Hardware Modeling Paradigm

Traditional hardware design languages like Verilog were designed to model naturally concurrent behavior, and they naturally leaned on a concept of threads to express this. This idea of independent...

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EDA Tech Forum Article on Ecosystem Enablement

I have an article about ecosystem enablement for new hardware, co-authored with Richard Schnur of Freescale published in the December 2008 issue of EDA Tech Forum. The core concept is that a virtual...

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Eclipse Linux Kernel Indexing Works

Edited on 2009-Feb-01, to include the link to the illustrated guide that really helps you get there faster. Thanks Simon! Also, promoted to front page, original post was put up on 2008-Nov-09. Thanks...

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Adding to Schirrmeister’s Virtual Platform Myth Busting

Frank Schirrmeister of Synopsys recently published a blog post called “Busting Virtual Platform Myths – Part 1: “Virtual Platforms are for application software only”. In it, he is refuting a claim by...

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I Want One… Trillion Instructions…

There is an eternal debate going on in virtual platform land over what the right kind of abstraction is for each job. Depending on background, people favor different levels. For those with a hardware...

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Guest Blog at Cadence: “Way Worse than the Real Thing”

Virtutech and Cadence yesterday announced the integration of Virtutech Simics and Cadence ISX (Incisive Software Extensions), which is essentially a directed random test framework for software. With...

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Cadence Industry Insight: “Virtual Platforms Unite HW and SW”

Another Cadence guest blog entry, about the overall impact of virtual platforms on the interaction between hardware and software designers. Essentially, virtual platforms are a great tool to make...

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The TLM DAC

The past few days here at DAC, a big theme has been transaction level modeling (TLM). TLM is often considered to be SystemC TLM-2.0. Most of the statements from the EDA companies are to the effect that...

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Conquering Software with Software High-Level Synthesis

This post is a follow-up to the DAC panel discussion we had yesterday on how to conquer hardware-dependent software development. Most of the panel turned into a very useful dialogue on virtual...

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Checkpointing in SystemC @ FDL

Along with Marius Monton and Mark Burton of GreenSocs, I will be presenting a paper on checkpointing and SystemC at the FDL, Forum on Specification and Design Languages, in late September 2009. The...

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The System, Not the Parts

I just listened to the November 16, 2009, issue of the BBC podcast called “Peter Day’s World of Business“. It is a rerun (in memoriam) of an interview with business professor Russell Ackoff, which was...

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CoWare SystemC Checkpointing

Continuing on my series of posts about checkpointing in virtual platforms (see previous posts Simics, Cadence, our FDL paper), I have finally found a decent description of how CoWare does things for...

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Neat Register Design to Avoid Races

In his most recent Embedded Bridge Newsletter, Gary Stringham describes a solution to a common read-modify-write race-condition hazard on device registers accessed by multiple software units in...

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Describe is not the same as Design

The discussion on my previous blog post about “the ideal ESL language” made me think some more about the purpose of a hardware modeling or description language. If you look closely, you realize that...

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Interrupts and Temporal Decoupling

I am just finishing off reading the chapters of the Processor and System-on-Chip Simulation book (where I was part of contributing a chapter), and just read through the chapter about the Tensilica...

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EETimes: James Aldis on Performance Modeling

James Aldis of TI has published an article in the EEtimes about how Texas Instruments uses SystemC in the modeling of their OMAP2 platform. SystemC is used for early architecture modeling and...

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Register Design Languages – DSL or not?

Recently, Gary Stringham has been running a series of interviews with providers of register design tools on his website. Register design tools seems to be an active area with several small companies...

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Carbon “Swap ‘n’ Play”– A New Implementation of an Old Idea

Carbon Design Systems have been quite busy lately with a flurry of blog posts about various aspects of virtual prototype technology. Mostly good stuff, and I tend to agree with their push that a good...

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Some Fun Cache Results from Carbon

Carbon Design Systems have been on a veritable blogging spree recently, pushing out a large number of posts around various topics. Maybe a bit brief for my taste in most cases (I have a tendency to...

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Intel Technology Journal on Simics

The September 2013 issue of the Intel Technology Journal (which actually arrived in December) is all about Simics. Daniel Aarno of Intel and I served as the content architects for the issue, which...

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