DVCon Europe is coming up in late October. This year, I am going to present a tutorial on using the public release of the Intel Simics Simulator to model a PCIe-attached accelerator subsystem. It is fun to be back speaking at the DVCon, after a couple of years of not having talked at the conference. DVCon Europe is a virtual event this year too due to Covid.
The DVCon Europe Conference for 2021
DVCon Europe has grown into the primary practical conference for design technology in Europe, as far as I am concerned. In particular when it comes to papers and presentations related to virtual platforms and their use in design validation and verification. Sometimes, the verification side might be a little bit too deep for my interests, but it tends to be good. The tutorial day in particular typically provides some useful insights.
The conference covers two days, the first day (October 26) featuring tutorials, and the second day (October 27) papers. Both days are rounded off with some really promising-looking keynotes and panels. On October 28, the traditional SystemC Evolution day takes place in conjunction with DVCon Europe, just like previous years.
DVCon Europe 2021 is a virtual conference. I wondered if it was maybe a bit conservative to decide to go virtual for 2021 when the decision was made before the summer… But it turned out to be the right thing to do. While Europe is finally opening up for real after Covid (and I do hope that lasts), and it actually looks like the current rules in Bavaria would allow an in-person DVCon, those developments have been rather recent. There was no way to know that for sure when decision was being made back. Company-internal travel rules are still an issue too, plus travel from outside the EU is definitely hit-and-miss. Virtual it is, hopefully the second time is the last time.
To make the virtual event a bit more personal, we are going to use the same kind of virtual avatar-based 3D environment as was used in 2020. The virtual world will be used for more purposes than last year. I am definitely going to miss having beers after hours with the other nerds there, but I guess I will just go buy myself some German beers and drink them all at home instead.
If you want to learn more about DVCon, I a few blog posts related to previous years’ DVCon Europe conferences. In particular, did some post-event write-ups about 2018 and 2020.
The Simics Tutorial
I will present a tutorial about Simics at DVCon. This is a quick walk-through of a workshop that is going to be part of the public release of the Simics simulator. The workshop demonstrates how to model a Mandelbrot fractal hardware accelerator in Simics, including making it into a (simulated) PCIe add-in card.
The overall design consists of three unique device model types: a compute unit, a control unit to orchestrate the work of the compute units, and a display unit that is used to convert the raw results from the compute units into pixels on a display. For simplicity and demo effect, it is directly connected to a standard graphics console.
The tutorial and workshop will cover topics such as the modeling languages used in Simics – DML, Python, and a little bit of Simics command-line scripting. The DVCon tutorial can only quickly touch on the subject, but will show snippets of code and explain what is going on.
For example, some pieces of DML code for the compute unit:
Here is an example of what the accelerator looks like in action, during development of the models and software. The graphics console shows the currently rendered image, while the Simics target serial console (green on black) shows the output of the application running on the target system. The white-on-black console is the Simics command line with debug logs from the simulated hardware and printouts from target software builds. Getting the color palette to work well has been a struggle, but a fun struggle.
The complete setup includes not just the model, but also the PCIe card wrapper and the software stack running on the target system. There is a PCIe device driver, and an application that uses mmap to directly access control registers and the local memory on the accelerator card.
With that it is possible to explore both basic modeling of a small device, spontaneous interactive device testing from the command line, unit testing, and integration of multiple devices into a subsystem. The target software can make use of one or more compute units to parallelize the computation. In addition, the accelerator is sufficiently compute-intensive that it makes sense to thread out the computations as background work inside the simulator itself.
I probably spent a bit too much time just exploring the fascinating performance effects of combining target-side parallelism with model threading, and how the load on the accelerator affects the efficiency of threading. It is also pretty cool to do animated zooms into the Mandelbrot set, rendered at a nice pace through the accelerator.
Disclosure
For full disclosure – the Intel Simics tutorial is a sponsored tutorial. I am also a member of the DVCon Europe program committee. To register for DVCon Europe 2021, go to https://dvcon-europe.org/registration/#